2026.09.29 | Substack | Optical | ECOC 2026 Takeaways: NPO
原标题:Research|Optics: ECOC 2026 Takeaways, NPO Gains Momentum as Slow and Wide Takes Shape
Moving from concepts toward products
We attended ECOC 2026 in Málaga last week. The debate between slow and wide and fast and narrow was a recurring topic in presentations and plenary sessions. Companies presented microLED and micro-VCSEL designs and discussed their performance, manufacturing challenges and production timelines. NPO was also in focus, with live NPO demos on the show floor and more discussion of how and when it ramps.
This note covers our takeaways from the presentations, demos and conversations with companies, including developments in NPO, scale-in, external lasers, retimers, DSPs, coherent-lite and test and measurement.
1. Theme
Slow and wide means many lanes at a low rate, typically 2-50 Gbps NRZ, using microLEDs or micro-VCSEL arrays instead of a few 200G or 400G PAM4 lanes. Lumentum, Coherent, ams OSRAM, Credo, Marvell, Avicena and even Nvidia’s research team all presented hardware or concepts at ECOC.
Companies at the Sunday workshop used different definitions of slow. OpenAI used less than 50 Gbps, while Marvell used slow and wide for 2-50 Gbps micro-emitters and flat optics for 50-100 Gbps.
The other debate was the choice between microLEDs and micro-VCSEL arrays. Credo’s first Active Light Cable uses microLEDs, but when we talked to the company, it told us it is working on both. Lumentum, Coherent and ams OSRAM presented micro-VCSEL approaches. Coherent also included a microLED architecture credited to Avicena in its slides. Avicena also had a microLED demo at its booth.
2. Why the industry cares
Power remains the main constraint. Marvell places slow and wide in scale-in and describes it as having the lowest total pJ/bit. Coherent showed GaAs VCSEL NPO/CPO at 1.2 pJ/bit with no external laser module. NRZ also offers simpler electrical signaling than high-baud PAM4 SerDes.
A separate slide at ECOC summed up the case for VCSELs as the lowest energy per bit, the lowest cost per lane, dense parallel arrays with sparing, simple coupling in and out of multimode fiber, manufacturing at massive scale across different supply chains, wafer-level test and burn-in and error-free low-latency NRZ.

Image 1. The case for high-speed VCSELs
Source: ECOC 2026
Reach is another reason operators are interested. Credo’s presentation uses 72 GPUs as copper’s limit and says its ALCs can extend a GPU domain to more than 300 GPUs in one optical hop. Binbin Guan, a member of the technical staff at OpenAI, said copper remains the best choice for short in-rack links, with pluggable optics used when copper can no longer meet the link budget. He also said slow and wide could be used for direct GPU-to-GPU links, while fast and wide could work for both in-rack and cross-rack links, including OCI.
The choice of material also seems to be driven by supply chain challenges. Lumentum and Coherent already have high-volume GaAs VCSEL capacity. These arrays would use GaAs manufacturing rather than the InP lines facing shortages. Cignal AI’s slide at the light sources workshop linked worldwide shortages to demand for InP.

Image 2. Cignal AI’s datacenter module outlook
Source: ECOC 2026; Cignal AI
Scale-in also came up many times across ECOC. Keysight’s slide at the Optica forum describes scale-in as within the node, where chiplets are densifying the package today and optical I/O to the die is on the horizon. Avicena mentioned that XPU makers want HBM taken out of the package and made replaceable since a failing HBM stack can take down the XPU. We also heard that XPU roadmaps are already set for the next two years, which puts the earliest opportunity for optics in the package in late 2028 or 2029. Our read is that microLEDs take the shortest links, while VCSELs cover the longer reaches within scale-in.

Image 3. Keysight’s scaling stack, from scale-across to scale-in
Source: Optica GPEF 2026; Keysight
Recent industry research is consistent with what we heard in our discussions and across presentations at ECOC, pointing to strong demand for 800G and 1.6T optical transceivers in 2027 as more links move from copper to optics. DSP availability, especially for 1.6T, is expected to constrain shipments, while both CW lasers and pump lasers were also highlighted in some of our discussions as being in tight supply. Smaller and secondary suppliers could benefit by filling the gaps in CW and pump laser supply.
NPO is gaining momentum. Almost every conversation we had across the supply chain added more detail on architectures, technologies and customer engagement, which gives us more confidence that NPO will arrive sooner rather than later.
Several transceiver makers, including InnoLight / TeraHop, are also working on 3.2T/6.4T NPO projects. Optical engine volumes across the industry are expected to reach single-digit millions in 2027 and tens of millions in 2028. Nvidia’s NPO project remains in sampling, with firmer orders potentially emerging toward year-end or in the first half of 2027.
Two main NPO architectures are being evaluated. In the first, the laser sits at the faceplate of the chassis, much like CPO. In the second, the laser sits inside the box next to the optical engines, which means lower-power CW lasers and lower laser pricing. In our discussions at ECOC, CW laser powers between 70 and 150 mW came up for that version, with Coherent at the low end of that range.
Arista’s openness to NPO came up several times in our conversations at ECOC and was also discussed in the Cignal AI webinar the week before the show, where TeraHop presented its Diablo-1 6.4 Tbps NPO with an integrated laser. At ECOC, a 12.8 Tbps XPO demo ran at 224 Gbps per lane on an Arista switch. One investor we spoke with described the split as Nvidia’s ecosystem leaning toward CPO while the CSP ecosystem leans more toward NPO. With Arista remaining open to NPO and XPO demonstrations already running on its switches, we expect both approaches to coexist.

Image 4. A 12.8T XPO demo running 64 channels at 224 Gbps per lane
Source: ECOC 2026; Amphenol

Image 5. The liquid-cooled XPO module and cable at the same demo
Source: ECOC 2026; Amphenol
3. Counterarguments
Packaging and reliability remain difficult. Higher fiber counts, optical alignment and flip-chip assembly are still open challenges for slow and wide. VCSEL-based slow and wide also faces electrical crosstalk and fiber attachment challenges, separate from the cost of the fibers themselves. VCSELs have a history of reliability issues in datacenter deployments, which has left some hyperscalers cautious, while Lumentum’s flip-chip assembly is still in development. MicroLEDs also have no field reliability record in this application yet, and GaN on sapphire can be more sensitive to electrical overstress, which can shorten emitter lifetime.
Individual emitter control allows arrays to include spare lanes to replace failed ones. Avicena said its coming product will switch these lanes on automatically when an active lane starts to degrade.
Temperature is another open question. It came up repeatedly in our ECOC conversations as one of the biggest challenges for micro-emitters in scale-in, even with liquid cooling.
MicroLED reach and bandwidth are limited by dispersion. In the Q&A, Mohsen Asad of Credo said chromatic dispersion can be compensated, but modal dispersion is the bigger problem and in practice limits an LED to around 2 Gbps per lane. Avicena’s booth demo ran at 3 Gbps per lane over 5 meters, so we would not treat 2 Gbps as a universal limit. Lumentum also said microLEDs cannot meet 50-meter links. These are company claims from the respective workshops rather than a common set of test results.
Cost is another issue. Passive copper costs next to nothing, so any optical replacement has a high bar to clear. VCSELs operating at 850-1060 nm typically require multimode fiber, which in these early applications is expected to be more expensive than single-mode fiber and also comes with yield considerations, particularly with OM4 and OM5. MicroLEDs face a similar cost challenge. Their low per-lane data rates require hundreds of parallel optical paths, increasing the amount and complexity of the fiber.
The main counterargument from Chris Cole of Applied Materials was timing. Speaking in a personal capacity, he said 200G serial is ramping and that options such as 4x50G arrived too late for the 200G market window. He called fast and narrow the only real option for 400G optics and said the packaging required for slow and wide is 4-6 years away. In that view, hardware designed today would be obsolete by the time the required packaging is ready.

Image 6. Chris Cole’s framing of the 400G serial question
Source: ECOC 2026; Chris Cole, Applied Materials
Peter Winzer, VP of Systems Architecture at Ciena, also expects high-speed SerDes to remain necessary through the 400G generation. In his framework, systems that still use copper stay with SerDes and Open CPX. OCI and slow and wide are for systems with no copper remaining.
Deployment evidence remains limited for now. OpenAI said simpler electrical signaling still needs reliability proof, while Nvidia described its VCSEL design as an exploratory concept rather than a product plan. We do not expect a named slow and wide deployment before the second half of 2027.
From talks with industry peers, we still expect active cables beyond copper’s reach to be the first use case for slow and wide. For scale-in, we still expect adoption at the switch and XPU package only after the 400G-per-lane generation.
4. Individual companies
The companies below are ordered by how directly slow and wide could impact revenue. Other ECOC takeaways are included under the relevant company.
Credo
We see Credo as the clearest listed near-term beneficiary of slow and wide. Among the companies discussed here, it already has a named product, an OCP demonstration date and an initial revenue target.
Subscribed Credo’s workshop slide calls the product ZeroFlap Active Light Cables (ALCs). The claimed specifications include 30-meter reach, a 100-million-hour MTBF, roughly 50% lower power than an AEC, up to 75% less cable bulk and spare channels for hitless failover. The slide below describes the pluggable cable as its first qualified product.

Image 7. Credo’s ZeroFlap Active Light Cables
Source: ECOC 2026; Credo
On the September 1 FY27Q1 earnings call, CEO Bill Brennan called the product Active LED Cables and said the first version uses microLEDs. Credo plans to demonstrate ALCs at the OCP Global Summit on October 12-15, 2026, with initial revenue targeted for fiscal 2028. Credo also said AECs remain its largest business and continue to grow.
At ECOC, Mohsen Asad, who leads Credo’s microLED and micro-VCSEL team, said the company is working on both versions. The microLED version is planned for a demo at OCP, while micro-VCSEL versions are targeted for 2027 and can reach around 50 meters. Credo also confirmed to us that it is working on both approaches. The company acquired Hyperlume to bring the emitter team in-house.
A second Credo slide says MoE and reasoning workloads require low-diameter, all-to-all connectivity. It says optics can maintain deterministic latency at 50 meters and beyond, allowing the same flat topology used at 72 GPUs to scale to more than 300. Credo cites Google’s TPU 8i, with 36 fully connected groups and up to 1,152 chips per pod.

Image 8. Credo’s case for wide-parallel optics in flat networks
Source: ECOC 2026; Credo
At its booth, Credo showed a 1.6T 2xDR4 transceiver at 200G per lambda, which it has not released yet. The module is fully retimed and built on Credo’s own Cardinal 802 DSP and Kfir 200 silicon photonics, acquired through DustPhotonics.
In the live PRBS test we saw, raw BER on the eight 200G lanes ran between 7.8 x 10⁻¹³ and 6.6 x 10⁻¹⁰, all well below the FEC threshold, and the Keysight scope showed a 106.25 GBd PAM4 eye with a TDECQ of 1.85 dB.

Image 9. Credo’s 1.6T module under a live BER and eye test
Source: ECOC 2026; Credo
Credo also demonstrated its ZeroFlap telemetry running on Arista SONiC, Arista EOS and Nvidia test clusters, reporting health, SNR, pre-FEC BER and temperature for every module. The dashboard we saw covered 64 ports of 800G ZeroFlap optics on an Arista 7060X6 running SONiC, with the local and remote ends side by side and a handful of ports scoring 60 compared with 80 for the rest.

Image 10. Credo’s ZeroFlap link telemetry on an Arista switch
Source: ECOC 2026; Credo
A mini rack next to it carried the ZeroFlap modules and fibers under blue light to show the cabling.

Image 11. Credo’s ZeroFlap mini rack demo
Source: ECOC 2026; Credo
Credo can raise the far-end module’s transmit power over the optical link to fix a weak link without swapping the module. The team told us a small sample has run six months without a link flap, with larger long-term tests now running, and that its DSP is on 5 nm and moving to 3 nm.
ALCs are designed to extend Credo beyond copper’s reach, but they could also eventually replace AECs on shorter links beyond 1.6T. Credo’s microLED approach could target distances below roughly 7 meters, although that still needs to be proven in production. With microLEDs first and micro-VCSELs later, the product line is not tied to a single emitter choice. We see this as an addition to Credo’s growing optics mix rather than a fiscal 2027 revenue driver, but it could become a meaningful contributor in fiscal 2028. Early customer interest in ALCs also came up in our conversations at ECOC, with Credo hinting at one of its existing hyperscaler customers, although Credo has not announced a customer yet.
Our discussions at ECOC with various industry peers also pointed to an emerging split by reach. MicroLEDs are being targeted at shorter links below 10 meters, including potential AEC replacement, while micro-VCSELs are being positioned for longer reaches above 10 meters. Avicena showed a working microLED demo at the show and is focused on microLEDs only, while our checks suggest Credo is focused on microLEDs for the shortest links and micro-VCSELs for longer ones. We also heard that ams OSRAM is putting more emphasis on micro-VCSELs than microLEDs.
Lumentum
We see Lumentum as the best-positioned VCSEL-array incumbent. At the workshop, Lumentum made the clearest case for VCSEL arrays over microLEDs. It highlighted VCSEL advantages across reliability, radix, reach, volume manufacturing, packaging and supply chain, while arguing that microLEDs cannot meet 50-meter links. Neither approach requires an external light source. When we spoke to its CTO, he was particularly enthusiastic about VCSEL technology.

Image 12. Lumentum’s scale-up and scale-in technology scorecard
Source: ECOC 2026; Lumentum
Lumentum’s 1060 nm arrays use 6-inch GaAs and draw on the 3D-sensing supply chain, which has already shipped billions of VCSEL arrays. Its slides showed no failures through 5,000 hours across 86 units in accelerated wear-out testing. Flip-chip assembly is still in development, with more reliability data expected over the next few months and data from additional wafers by year-end. Matthew Peters of Lumentum said its testing indicates 1060 nm will not have a wear-out issue even at 180°C, and described an infant-failure screen across 72,000 emitters.

Image 13. Lumentum’s 1060 nm VCSEL array manufacturability
Source: ECOC 2026; Lumentum
At Optica’s private Global Photonics Economic Forum on September 24-25, Michael Hurlston, Lumentum’s president and CEO, said scale-in could be bigger than scale-up. He sees the opportunity emerging around 2028-2029, with unit volumes potentially reaching the billions, as even short PCB traces struggle to carry the bandwidth coming out of compute engines. He said VCSELs appear to be the technology of choice, although emitter density and receivers still need to scale.
We also saw more indications at ECOC that chip-to-chip scale-in will initially use many slower GaAs VCSEL lanes rather than fewer fast InP lanes. VCSELs can deliver the required performance at lower power without relying on constrained InP capacity. Across the industry, 980 and 1060 nm are being discussed, with broader deployment generally expected around 2029 to 2030. Lumentum did downplay VCSELs for scale-up, although it still sees them as an interesting opportunity in scale-in.
Lumentum also announced a board-level demonstration with Qualcomm and Corning using 1060 nm VCSELs at 32 Gbps NRZ, Qualcomm’s D2D interface IP and Corning multimode fiber. The optical engine provides around 10 Tbps of aggregate transmit and receive capacity. Lumentum also won an ECOC award for its VCSEL-based FOWLP optical engine for AI scale-up.
Separately, Lumentum announced an eight-wavelength DWDM ELSFP module for OCI MSA applications, delivering up to 250 mW per wavelength at around 12 W of module power, with availability expected in the first half of 2027. At an evening event during the week, a Lumentum speaker said the company makes single DFB lasers for the OCI MSA and not arrays, because the specification requires both precision and accuracy. He also showed an 800 mW 1310 nm laser with more than 1 W of total power at 50°C.
Michael Hurlston also said the industry will begin shipping CPO and NPO in 2027. Lumentum already generates meaningful revenue from scale-out CPO lasers and expects to reach multiple customers by the middle to second half of 2027. With CPO and NPO ramping, he estimated that Lumentum could supply only around 30% of what customers are asking for in 2027, with supply and demand potentially moving closer to balance by 2029 or 2030.
Our discussions at ECOC also suggest that high-power InP laser supply could remain tight through 2028. At the same evening event, Lumentum said it bought a fab in Greensboro, North Carolina, in 2026 and expects it to come online around 2028, with any further capacity depending on demand. Bringing up new InP fab capacity remains a multi-year process, while demand continues to increase. Lumentum also discussed the possibility of licensing its laser IP to companies with underused InP fab capacity, including Nokia and potentially Cisco.
We see GaAs VCSEL arrays as a separate scale-in opportunity alongside the InP laser cycle. The next flip-chip reliability results remain the main item to watch.
Coherent Corp.
Julie Eng, Coherent’s CTO, said at the Optica forum that Coherent has the capacity to produce a billion VCSEL arrays a year. Her slide showed several approaches, including silicon photonics with remote or integrated lasers, GaAs VCSEL arrays, microLEDs with an image credited to Avicena, and 400G InP. Coherent also demonstrated GaAs VCSEL NPO/CPO at 1.2 pJ/bit without an external laser module and expects multiple technologies to coexist.

Image 14. Coherent’s four routes to near- and co-packaged optics
Source: Optica GPEF 2026; Coherent
Chris Kocot, Fellow in Coherent’s CTO Office, said at the slow and wide workshop that microLEDs are limited to around 3 GHz and that LED efficiency goes to zero at 4 GHz. He said he does not see how LEDs can compete with VCSELs, although there may be some special applications.
At its booth, Coherent showed high-density 2D VCSEL arrays coupled into multi-core fiber. Ribbon-fiber-style arrays were described as production-ready in the first half of 2027.
Coherent data presented during Dan Kuchta’s review showed a 1060 nm micro-VCSEL array with 37 emitters at 70 µm pitch, operating at 32 Gbps per emitter without a DSP and 106 Gbps PAM4 with transmit and receive equalization.

Image 15. Coherent’s high-density 1060 nm micro-VCSEL array
Source: ECOC 2026; Coherent
Coherent also announced Photonlink, which covers the optical link from the light source to the detector, including optical assembly and manufacturing. Coherent estimates that Photonlink adds $30b to its addressable market, with up to $15,000 of content per 100T chip. Its roadmap puts NPO production in the second half of 2027 and chip-to-chip optical deployments around 2029-2030.
Coherent has exposure to both the near-term InP/CPO cycle and the later slow and wide scale-in opportunity. Its existing GaAs capacity gives it another path to growth if VCSEL-based scale-in begins to ramp later in the decade.
ams OSRAM
At the ams OSRAM demo we visited, the company showed four 8 Gbps NRZ lanes on a microVCSEL array driver board, with the fiber aligned on manual stages. Ashkan Seyedi of ams OSRAM said fiber-to-fiber connection is needed to go inside the box to a server faceplate, and staff said the VCSEL needs no lens at about 2 to 3 mW.

Image 16. The ams OSRAM microVCSEL array driver board demo
Source: ECOC 2026; ams OSRAM
In a separate announcement, ams OSRAM described an 850 nm thin-film microVCSEL platform with a 25 µm pitch and silicon TSV integration. It reported error-free 32 Gbps NRZ operation at approximately 0.25 pJ/bit with no failures after more than 2,000 hours of elevated-temperature and current-overstress testing.
ams OSRAM is also industrializing microLED arrays from its EVIYOS automotive line and has a joint development agreement with Avicena. Its Digital Photonics portfolio includes both microLED and microVCSEL arrays, alongside matching micro-photodiode arrays.
We see ams OSRAM as having flexibility across both emitter approaches, although our discussions at ECOC suggest the company is putting more emphasis on microVCSELs. AI optics remains a smaller part of its overall business than for Lumentum, Coherent or Credo.
Avicena (private)
Avicena’s LightBundle uses hundreds of slow lanes with GaN blue microLEDs and silicon photodetectors. We visited Avicena’s booth at ECOC and saw the live demo working over 5 meters of multimode fiber. Avicena said the 1.6T cable built on its engines is focused on around 10 meters, as chromatic dispersion becomes an issue beyond 15 to 20 meters.
Each microLED in the demo modulated at 3 Gbps, and 325 active lanes delivered close to 1 Tbps without FEC. The channels achieved raw BER of 10⁻⁸ or better. The product will be 1.6T, and the next generation targets 6 to 8 Gbps per lane. Multimode fiber also allows up to 5 µm of alignment tolerance.
Avicena’s pitch against VCSELs is power and density. MicroLEDs have no threshold current, so they run on microamps instead of milliamps, and Avicena expects around 10 µm pitch against what it sees as probably 25-30 µm for VCSELs. A hyperscaler told Avicena to lead with reliability, since LEDs fail gradually and the array carries spare lanes, which the coming product will switch on automatically if a lane starts to degrade.
Avicena sells optical engines to module makers or for NPO and CPO integration, not cables of its own, and its evaluation kits are already with customers. It sees chip-to-chip as the end goal.
ams OSRAM is working with Avicena on manufacturing. Credo is developing its own competing cable, and Marvell could develop a product of its own through its Mojo Vision relationship.
Marvell
Marvell places slow and wide mainly in scale-in at the tray level, using 2-50 Gbps NRZ microLEDs or micro-VCSELs to achieve the lowest total pJ/bit. Lenin Patra, Senior VP and CTO of the Platform Business Unit at Marvell, mentioned that the shift from copper to micro-emitter optics at the tray level is already happening.

Image 17. Marvell’s view of optics by use case, from scale-across to scale-in
Source: ECOC 2026; Marvell
For scale-up, Marvell’s slide shows active and passive copper at 100G per lane, with NPO and CPO added alongside copper at 200G and 400G per lane. Another slide places optics in rack-to-rack scale-up across thousands of XPUs, with lane speeds moving from 224G to 448G.

Image 18. Marvell’s view of scale-up connectivity by lane rate
Source: ECOC 2026; Marvell
Marvell expects most pluggable modules to serve scale-out, while NPO will be used mainly for scale-up. Its slides describe 1.6T scale-out as FRO/TRO-driven, with 3.2T coherent-lite inside the datacenter.
Marvell’s scale-out offering includes Ara, TIAs and driver chips, while its NPO/CPO offering is focused on TIAs and drivers. Retimed pluggables use a DSP, while the NPO/CPO optical engines Marvell discussed use TIAs and drivers without one. Marvell also noted that 800G and 1.6T FRO, TRO and LPO pluggables have already shipped in the tens of millions, while NPO and CPO are only beginning to ramp.
Marvell’s ecosystem slide below shows that NPO development is already expanding across package, PIC, EIC and module vendors.

Image 19. Marvell’s NPO/CPO ecosystem readiness
Source: ECOC 2026; Marvell
Marvell also highlighted optical alignment, fiber attachment, yield and thermal management as key deployment challenges. NPO inside the line card also remains difficult to replace, even with a CPX socket. On timing, Marvell said it is still unclear whether deployment starts next year or the year after.
For coherent-lite, Marvell places 1.6T and 3.2T between PAM4 and coherent, targeting campus reaches of around 2-20 km.

Image 20. Marvell’s coherent-lite positioning by reach
Source: ECOC 2026; Marvell
Marvell is not tied to one emitter approach since its exposure spans silicon photonics CPO, TIAs, drivers and DSPs, alongside its relationship with Mojo Vision on microLEDs. We see 1.6T/3.2T, NPO/CPO EICs and coherent-lite as the main optics drivers, while micro-emitters are unlikely to become a meaningful earnings contributor in 2027. As NPO/CPO ramps, Marvell’s mix shifts more toward TIAs and drivers. Semtech is also worth watching as the only other commercial EIC vendor shown in Marvell’s ecosystem slide.
Ciena
Peter Winzer, Vice President of Systems Architecture at Ciena and founder of Nubis Communications, said high-speed SerDes will remain necessary through the 400G generation. Ciena acquired Nubis to build massively parallel interfaces, but he sees chiplet-integrated, optics-only interfaces further out. Systems that still use copper remain on SerDes and Open CPX, while OCI and slow and wide come into play once copper is no longer used.
Peter Winzer also said Open CPX version 1.0 was published the week before ECOC. The specification covers socketed 6.4T and 7.2T modules carrying either copper or optics, with modules already sampling. The ecosystem includes Coherent, Marvell, Credo, Lumentum, Intel, Amphenol, TE and Viavi.

Image 21. The Open CPX MSA as presented by Ciena
Source: ECOC 2026; Ciena
In a separate presentation, Ciena showed its Vesta 200 6.4T CPX on Broadcom’s Tomahawk 6 as a near-package optics use case for Open CPX, with a live demo at booth 1045.
Peter Winzer also compared the power of different 200G PAM4 links. He put AECs at 4.5 meters and 11 pJ/bit, retimed optics at 16 pJ/bit, active copper with an analog redriver at 3.5 meters and 1.5 pJ/bit, and linear optics such as LPO and CPX at 6 pJ/bit. He said retimers add power, latency and jitter, with electricity costs in a large cluster potentially reaching $1b over its lifetime.

Image 22. Ciena’s retimer-free power comparison
Source: ECOC 2026; Ciena
Ciena’s Nitro redriver supports retimer-free active copper with 70 dB of channel loss at 53 GHz for 200G PAM4. Another example uses 23% passive and 77% active copper across 256 XPUs, adding around 1 pJ/bit. Peter Winzer said the example spans four racks at 25 Tbps per XPU and that copper remains important through at least the 400G generation. In a separate presentation, Ciena said LPO at 200G PAM4 remains challenging, with BER above 10⁻⁸ and half-retimed links still under investigation. Ciena also told us its 448 Gbps per lane demo at the OIF used PAM6.
For scale-across, Peter Winzer showed four 12.8T XPOs carrying 51.2 Tbps across the C and L bands, alongside amplifier integration with 128 amplified fiber pairs per rack. The slides give a reach range of 10 to 10,000 km, with thousands of parallel fibers. He also said scale-across is being used to move AI workloads to where there is enough electricity at the time, and that a full-spectrum transponder box fits 100 Tbps of coherent capacity in one RU, or more than 3.2 Pbps per rack including client and line interfaces. The campus photos on the slide are credited to Meta. More broadly, the scale-across TAM keeps growing on both the system and the component side.

Image 23. Ciena’s scale-across transponder and amplifier density
Source: ECOC 2026; Ciena
Ciena’s acquisition of Nubis gives it longer-term exposure to parallel optical I/O; we do not see it as a slow and wide product launch in 2027. In the current cycle, Ciena is also pushing retimer-free copper through Nitro. Its case against retimers also supports its own redriver approach, which competes with AECs on short copper links.
Nvidia
Nvidia’s exploratory VCSEL concept targets 57.6 Tbps per GPU in each direction, 50 Gbps NRZ per fiber and 10 meters of reach. Those figures are based on Nvidia’s modeling rather than measured hardware results.

Image 24. Nvidia’s exploratory slow and wide VCSEL concept
Source: ECOC 2026; Nvidia
Dan Kuchta, Nvidia’s Principal Hardware System Architect, clarified that his VCSEL review was not an official Nvidia presentation. He said one design study with 60,000 fibers per drawer was paused because of the high cost of fiber. He does not know when 200G VCSELs will be commercial and sees 200G as probably the last data rate today’s oxide-confined VCSEL design can reach. He said 1 pJ/bit is attainable with VCSELs and that VCSEL NPO is gaining traction, mostly in Asia. He also said Chinese VCSELs are cheap and readily available at 100G, which we see as a pricing point to watch for the listed VCSEL suppliers.
Dan Kuchta also reviewed 200G VCSEL development at Broadcom, Coherent, Sony and Huawei, with reported room-temperature reaches of 50-100 meters over multimode fiber for their 850 nm designs.

Image 25. 200G VCSEL developments reviewed by Dan Kuchta
Source: ECOC 2026; Dan Kuchta, Nvidia
LightXcelerate data presented during Dan Kuchta’s review showed 56 Gbps PAM4 per micro-VCSEL per core over 19-core multicore fiber at 1060 nm, adding up to 1 Tbps per fiber.

Image 26. LightXcelerate’s micro-VCSEL link over 19-core multicore fiber
Source: ECOC 2026; LightXcelerate
Nvidia also made clear that pluggables are not going away in the near term. One of its slides calls OSFP the workhorse, with TRO and DR4+ added for Spectrum-6, while a separate slide positions Spectrum-X CPO as purpose-built for AI factories. Nvidia highlighted fewer discrete components, lower power and higher reliability as the main advantages of the CPO design.
Nvidia also showed how its network architecture changes as AI clusters get larger, moving from traditional top-of-rack designs toward multi-rail and multiplane Spectrum-X topologies. Nvidia said its Ethernet multiplane architecture can extend AI-factory scale by 64x. The topology is not yet widely adopted, with some hyperscalers still using traditional designs.
AMD
At the light sources workshop, AMD presented the OCI MSA for optical scale-up. The slide included Meta, Microsoft, OpenAI, AMD, Broadcom and Nvidia. AMD outlined the requirements for an eight-wavelength ELSFP external laser module and described discrete high-power InP DFB lasers as the leading approach, with cost and scalability as the main tradeoffs. Haisheng Rong, Sr. Fellow at AMD, also said comb lasers still have issues to solve before gaining wider adoption.

Image 27. The OCI MSA as presented by AMD
Source: ECOC 2026; AMD
Oracle
Mark Filer, Architect / Distinguished Engineer at Oracle, said a pluggable external laser can create reliability problems if handling fouls the blind-mate connector. He cited Meta and Google data showing that CW, EML and silicon photonics lasers rarely fail, and said internal lasers could use either lower-power lasers or fewer higher-power ones. For scale-out NPO/CPO, Oracle prefers an integrated laser if that approach proves viable.
The location of the laser is still an open question. The OCI MSA provides a standard for external lasers in scale-up, while Oracle favors integration for scale-out. TeraHop showed a similar approach with its Diablo-1 6.4 Tbps NPO live demo at ECOC, which used an integrated CW laser. Industry notes also point to both integrated-laser and ELS designs, with suppliers looking to use more 100-150 mW CW lasers even in ELS solutions. The value of the external laser module and the number of lasers required per system will ultimately depend on the architecture.
Oracle’s 800G fleet comparison covers 156,591 LPO links and 202,042 FRO links. LPO is slightly better on median pre-FEC BER and much better at the 99th percentile. Over one month, the share of FRO links with at least one flap was 75% higher than for LPO.

Image 28. Oracle’s 800G LPO and FRO fleet data
Source: ECOC 2026; Oracle
At 1.6T, Oracle’s plan of record is LRO at 16 W because it does not believe LPO can comfortably meet signal-integrity and interoperability requirements at that rate. Oracle said LRO interoperability has already been demonstrated across suppliers and multi-vendor 3 nm DSPs, while CPO- and NPO-based systems should now start moving into trials. Oracle already uses linear optics at 800G, but for 1.6T it plans to use LRO with a DSP in the module.
Not everyone at the show agrees with LPO. A vendor we spoke with who used to sell DSPs called himself a total LPO skeptic and said LPO only works when every link in the system is engineered, which in his view does not make it a product.
On test, Oracle said laser mode hopping in 800G and 1.6T pluggables can cause wavelength shifts, uncorrectable errors and link flaps. Fixed-temperature testing alone is not enough to screen for it. For uncooled lasers, Oracle recommends temperature and current sweeps, together with SMSR and wavelength monitoring at the laser, chip-on-carrier and module levels, or using cooled lasers instead.

Image 29. Oracle’s lessons on laser mode hopping
Source: ECOC 2026; Oracle
Huawei
Huawei’s 7.2T Hi-ONE NPO has high-power lasers built on board, no polarization-maintaining fiber and a FIT below 1 with one-to-one backup. Zhang Shiyong, its CSO, said at the workshop that the module had been officially announced a few days earlier.

Image 30. Huawei’s 7.2T Hi-ONE NPO with built-in lasers
Source: ECOC 2026; Huawei
Nokia
Nokia places 1.6T and 3.2T coherent-lite below 40 km using 220-247 GBd in OSFP with a 30 W target. Its comparison puts 1.6T ZR, ZR+ and ZR++ (which is an enhanced version of ZR+) at 43 W while 2.4T high-performance modules are at 60 W.
Nokia said the OIF is discussing 1600 coherent-lite with a 10 km minimum reach, while 1600ZR and ZR+ are further along in the standardization process. The speaker also said coherent-lite has been under discussion for about a year with DSP makers still deciding between two baud rates.

Image 31. Nokia’s baud rates for 1.6T and 2.4T applications
Source: ECOC 2026; Nokia
Nokia also said CPO and NPO routers leave no place for a pluggable, which brings transponders and media converters back into the architecture. Its media converter uses an XR6 1.6T coherent TROSA and Huron 1600G DSP to convert client IMDD signals into a coherent line signal.
Nokia also said there is no 3.2T standard yet and no 448G standard, and that the 3.2T generation has nothing in the OIF so far. It described XPO as very elegant mechanically but said it does not scale to 3.2T.
Marvell and Nokia are still showing different reaches for coherent-lite, while the baud rate is also not settled. The next things to watch are how the OIF standardization develops for 1600ZR/ZR+ and where 1600 coherent-lite ultimately lands.
Keysight
At the Optica forum, Satish Dhanasekaran, Keysight’s president and CEO, said AI demand continues to surprise the industry and that forecasts keep moving higher each quarter. Keysight highlighted first-sample 448G-per-lane transceivers with InnoLight, a multi-vendor demonstration with Lumentum, NTT and Coherent validating 448G-class optical components, and work with leading customers on 1.2T coherent transmission for scale-out networks.

Image 32. Keysight’s industry collaborations
Source: Optica GPEF 2026; Keysight
Satish Dhanasekaran also said customers are accelerating work on 800G, 1.6T and 3.2T at the same time, across copper, LPO, NPO and CPO. Keysight is involved in the LPO, ACC, OCI, XPO and Open CPX MSAs, while CPO and NPO testing now spans from wafer-level testing through the finished module.
The OIF booth demos also came up in our conversations. We heard of 448G PAM4 at a BER of 10⁻⁴ over a 28 dB electrical trace and PAM6 over a 1.3-meter channel at 10⁻³. Our discussions did not identify a 300G-per-lane demo.
For test and measurement, this means more technologies are being developed in parallel and more test points are being added. Oracle’s push for additional manufacturing checks on pluggables with uncooled lasers adds to that demand.
Teradyne
Teradyne announced Iris 100, which measures individual microLED emitters within an array and integrates with UltraFLEXplus for combined optical and electrical testing. The system targets microLED manufacturing for both AR displays and optical data interconnects. Production-grade test equipment for microLED arrays suggests the technology is moving from lab demonstrations into manufacturing, another sign of industry adoption.
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